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(parent: 6d112f2) | patch
credit2: Fix erronous ASSERT
authorGeorge Dunlap <george.dunlap@eu.citrix.com>
Mon, 11 Mar 2013 08:56:02 +0000 (09:56 +0100)
committerJan Beulich <jbeulich@suse.com>
Mon, 11 Mar 2013 08:56:02 +0000 (09:56 +0100)
commit582ea94410cb266bbf3cd308046f5ea8ae25055f
tree8fbced064243b824ae22c40e5f8ac25e9e4445aetree | snapshot
parent6d112f2b50ba9cf6ecf0b35eea691345cc0196d7commit | diff
credit2: Fix erronous ASSERT

In order to avoid high-frequency cpu migration, vcpus may in fact be
scheduled slightly out-of-order.  Account for this situation properly.

Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
xen/common/sched_credit2.c diff | blob | history
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